Course #12

Embedded Data Converters

October 25-28, 2010. Barcelona, Spain.

INSTRUCTOR
Dr.  Rudolf Koch, Consultant, Munich, Germany

TECHNOLOGY FOCUS 
Powerful digital signal processing has been the key enabler of many technological breakthroughs during the last decades. So-called 'digital' communications brought us a worldwide wireless communications network and high-speed wireline internet access. Processor based mechatronical systems have increased efficiency, reduced waste, and raised security in nearly every application you may think of.
The interface between the "analogue" environment and the digital signal processing is the data converter. Steadily increasing resolution and bandwidth of the A-to-D and D-to-A converters, at no additional area or power consumption, were the other key enablers of this progress. 
Following the trend to ever higher integration levels today most data converters are embedded in a System-on-Chip together with a selection of RF, analog, and digital blocks, complete DSPs, µPs, or even MEMS. This defines another paradigm change, posing new chances and new challenges to the concept engineers and to the designers: now they have a complete system in their hands, with all chances for optimization, but also with the need to understand the complete system as well as the tradeoffs between the various blocks and solutions. 

COURSE OBJECTIVES and CONTENT
The objective of this course is to teach what is necessary to select and to design the right data converter under consideration of system aspects and tradeoffs.
To this end, we will brush up the basics of sampling, quantization, and Fourier transforms. We will look into a complete signal processing chain, discuss tradeoffs and show how to derive the requirements for the ADC. Based on figures of merit and a large database the application ranges and performance limits for the various converter architectures are investigated. And, of course, we will spend most of the time understanding the basic concepts as well as the practical aspects of the relevant converter architectures. Time encoding, i.e. replacing voltage levels by quantization along the time axis, will be introduced. Finally Sigma-Delta Modulators, as the workhorse of communication ICs, will get extensive treatment. . MATLAB/SIMULINK macromodels for nonideal FLASH and for SC Sigma-Delta Converters will be presented. A practical example concludes the course.
Having all these topics covered by one speaker makes this is a very compact, coherent course without unnecessary redundancy or inconsistencies.

WHO SHOULD ATTEND
This course is aimed at system and concept engineers who need to better know the role of the data converter in a system, the choices, the chances and the limitations. It also targets design engineers who wish not only to understand the theoretical and the practical aspects of the different converter topologies but also to get a view beyond the converter. Pre-requisites for the course are a basic understanding of semiconductor circuits and blocks together with some (limited) knowledge of analog circuit design.

Monday 
During the first day we will learn applications of data converters, brush up some theoretical background, learn the basic concepts and definitions underlying A-to-D conversion, and start looking into high speed A-to-D converters. 

Applications of Data Converters 

• General Systems
• Wireless Communications Systems 

Theoretical Background

• Sampling
• Aliasing
• Quantization
• Discrete Fourier Transform

High Speed A-to-D Converter Concepts

• Definitions and Error Mechanisms
• FLASH
• Two-Step and Sub-ranging
• Folding
• Time Interleaved
• Pipelined 

Tuesday
During the second day, we will first continue with Nyquist type ADCs, studying power and/or area efficient implementations. Then figures of merit will be introduced. Derived by statistical evaluation of a large database, graphs will clearly show trends, application ranges and tradeoffs of the various A-to-D converter concepts. After that we will cover DAC architectures and implementations and end the day with the basics of Sigma-Delta-Converters. 

Efficient A-to-D Converter Concepts

• Algorithmic
• Successive Approximation
• Slope
• Asynchronous 

D-to-A Converter Concepts 

• Basics
• Resistor Based
• Switched Capacitor
• Switched Current
• Figures of Merit, Some Statistics

Oversampling and Noise Shaping Converters 

• Delta Modulator
• Sigma-Delta ADCs: Basic concept and linear model
• Single Loop, Single Bit
• Higher Order
• Multi-Bit
• Feedback versus Feedforward Architecture
• Stability for Bounded and Unbounded Inputs

Wednesday
The third day will continue with sigma-delta-converters, discussing some complex implementations and some unusual applications. Aspects of modelling, design flow, and a look into Schreier's toolbox for synthesis and simulation conclude sigma-delta-converters. We will finish our examination of data converters by discussing the basic concept and implementations of time encoding converters. 

Sigma-Delta Converters 

• Unusual SDM Applications
• Bandpass and Complex SDM
• Cascaded (MASH)
• Continuous Time vs. Discrete Time
• Modelling, Design Flow
• Schreier's Toolbox
• PDM-Filter

Time Encoding 

• Basics, PDM and PWM Signals
• Sigma-Delta DACs
• PWM Signal Generation - Class D Amplifiers
• Time-to-Digital Converter (TDC)

Thursday 
The last day will start with an introduction to analog filters and some basic topologies. The need and the methods of filter tuning to overcome PVT variations will be introduced. With this knowledge we can take another look into the signal processing chain from source to ADC, discuss tradeoffs and describe a method to derive the ADC specification. Finally some very practical aspects like design for noise, matching, and layout issues will be treated.  A practical example in Sigma-Delta converter synthesis and top-level simulation concludes the course. 
The participants are welcome to bring in and discuss their own example.

Filters 

• Filter Characteristics
• Filter Implementation, Active Biquads
• Tuning 

System Tradoffs

• VGA-Filter-Converter - how do I partition my system?

Noise

• Thermal and 1/f Noise
• Noise Reduction: Chopping, Correlated Double Sampling

Practical Example

• Selection, Synthesis and Top Level Simulation of a Sigma-Delta Converter for a Digital Microphone
• On Request: Attendees' Examples.

Regular Course Fee: EUR 2490

Early Registration Course Fee: EUR 2240
This applies to firm registrations received 2 months before course start. 

University Student and Faculty Rate:
Two university participants are welcome to attend for one course fee if payment is to be made from university funds.

Deliverables:
The course fee covers tuition, course material, and the day conference packages (morning/afternoon refreshments, lunches etc.,) paid on your behalf to the course venue. Accommodation is not included. 

Payment before course start.