Course #12
Embedded Data Converters
We recommend you to submit your
preliminary or firm registration at least 4 weeks before course
start to ensure a seat on the course.
New date to be decided
TECHNOLOGY FOCUS
Powerful digital signal processing has been the key
enabler of many technological breakthroughs during the last
decades. So-called 'digital' communications brought us a worldwide
wireless communications network and high-speed wireline internet
access. Processor based mechatronical systems have increased
efficiency, reduced waste, and raised security in nearly every
application you may think of.
The interface between the "analogue" environment and the digital
signal processing is the data converter. Steadily increasing
resolution and bandwidth of the A-to-D and D-to-A converters, at no
additional area or power consumption, were the other key enablers
of this progress.
Following the trend to ever higher integration levels today most
data converters are embedded in a System-on-Chip together with a
selection of RF, analog, and digital blocks, complete DSPs, µPs, or
even MEMS. This defines another paradigm change, posing new chances
and new challenges to the concept engineers and to the designers:
now they have a complete system in their hands, with all chances
for optimization, but also with the need to understand the complete
system as well as the tradeoffs between the various blocks and
solutions.
COURSE OBJECTIVES AND CONTENT
The objective of this course is to teach what is
necessary to select and to design the right data converter under
consideration of basic system aspects and tradeoffs.
We will brush up the basics of sampling, quantization, and Fourier
transforms. We will look into a complete signal processing chain,
discuss tradeoffs and show how to derive the requirements for the
ADC. Based on figures of merit and a large database the application
ranges and performance limits for the various converter
architectures will be investigated. And we will spend a lot of time
on understanding the concepts, as well as the practical aspects of
the relevant converter architectures. Time encoding, i.e. replacing
voltage levels by quantization along the time axis, will be
introduced. Sigma-Delta Modulators, as the workhorse of
communication ICs, will get extensive treatment. For each converter
architecture, published examples will be analyzed. The top
level design of a Sigma-Delta-Converter will be demonstrated and
the basic principles of data converter testing will be introduced.
For a deeper understanding, the attendees will implement simple
MATLAB routines for the evaluation of measured data. Finally,
exemplary solutions will be discussed and given to the
attendees.
Having all these topics covered by one speaker makes this a very
compact and coherent course with high practical relevance.
WHO SHOULD ATTEND
This course is aimed at system and concept engineers who
need to better know the role of the data converter in a system, the
choices, the chances and the limitations. It also targets design
engineers who wish not only to understand the theoretical and the
practical aspects of the different converter topologies but also to
get a view beyond the converter. Pre-requisites for the course are
a basic understanding of semiconductor circuits and blocks together
with some (limited) knowledge of analog circuit design. First
experience with data converters is helpful.
Attendee equipment:
A pocket calculator is helpful for some of the exercises.
For the last day a notebook with appropriate software,
MATLAB with Control System, Signal Processing Toolboxes*, or OCTAVE
with Control, Signal, Missing-functions Toolboxes, is required to
actively participate in the practical exercises. You will work in
groups of 2 to 4 people.
Unfortunately we cannot offer the attendees a temporary MATLAB
license, however, the freeware program OCTAVE** can as well be used
to code and simulate m-files (but not mdl-files).
* From The Mathworks, www.mathworks.com
** http://www.gnu.org/software/octave
and https://sites.google.com/site/guioctave/
Monday
During the first day, we will browse applications of data
converters, brush up some theoretical background, learn the basic
concepts and definitions underlying A-to-D conversion, and start
looking into high speed A-to-D converters.
Applications of Data Converters
Theoretical Background
- Sampling
- Aliasing
- Quantization
- Discrete Fourier Transform
High Speed A-to-D Converter Concepts
- Definitions and Error Mechanisms
- FLASH
- Two-Step and Sub-ranging
- Folding
- Time Interleaved
- Pipelined
Tuesday
During the second day, we will continue with Nyquist type
ADCs, studying power and/or area efficient implementations. Then
figures of merit will be introduced. Derived by statistical
evaluation of a large database, graphs will clearly show trends,
application ranges and tradeoffs of the various A-to-D converter
concepts. After that we will cover DAC architectures,
implementations and end the day with the basics of
Sigma-Delta-Converters.
Efficient A-to-D Converter Concepts
- Algorithmic
- Successive Approximation
- Slope
- Asynchronous
Noise
- Thermal and 1/f Noise
- Noise Reduction: Chopping, Correlated Double Sampling
Figures of Merit, Statistics, Trends
D-to-A Converter Concepts
- Basics
- Resistor Based
- Switched Capacitor
- Switched Current
- Advanced Concepts
- Figures of Merit, Some Statistics
Oversampling and Noise Shaping Converters
- Delta Modulator
- Sigma-Delta ADCs: Basic concept and linear model
- Single Loop, Single Bit
- Higher Order
- Multi-Bit
- Feedback versus Feedforward Architecture
- Stability for Bounded and Unbounded Inputs
Wednesday
The third day, we will continue with
sigma-delta-converters, discussing some complex implementations and
some unusual applications. Aspects of modeling, design flow, and a
look into Schreier's toolbox for synthesis and simulation conclude
sigma-delta-converters. We will finish our examination of data
converters by discussing the basic concept and implementations of
time encoding converters.
Sigma-Delta Converters
- Unusual SDM Applications
- Bandpass and Complex SDM
- Cascaded (MASH)
- Continuous Time vs. Discrete Time
- Modeling, Design Flow
- Schreier's Toolbox
- PDM-Filter
Time Encoding
- Basics, PDM and PWM Signals
- Sigma-Delta DACs
- PWM Signal Generation - Class D Amplifiers
- Time-to-Digital Converter (TDC)
Thursday
The fourth day will start with an introduction to analog
filters, some basic topologies and the need and the methods of
filter tuning to overcome PVT variations. With this knowledge we
will take another look into the signal processing chain from source
to ADC, discuss tradeoffs and describe a methodology how to derive
the ADC specification. A practical example in Sigma-Delta
converter synthesis and top-level simulation concludes the
day.
Filters
- Filter Characteristics
- Filter Implementation, Active Biquads
- Tuning
System Tradoffs
- VGA-Filter-Converter - how do I partition my system?
Practical Example
- Selection, Synthesis and Top Level Simulation of a Sigma-Delta
Converter for a Digital Microphone
Friday
During the last day common converter test methods, strongly based
on an IEEE standard for ADC test, will be explained. The attendees
will receive a set of 'measured' data and program the core routines
to evaluate them.
o Histogram based test
o FFT based test
- "Hands-on" Exercises (group work)
- Exemplary solutions
Said
about the course from previous participants:
"Broad coverage of ADC and DAC with various concepts and
architecture. Well-organized and introduced presentation."
"The course brings up new techniques and it gives a good overview
of existing and future standards."
"Good mix between overview and deep information."
"Quite complete scope of different topics."
"Many references, clear overview, many examples and real circuits
included, nice graphs, good slides - good reference course for the
entire company!"