Signal and Power Integrity: Advanced High-Speed Design and Characterization - CEI-Europe
Course #54

Signal and Power Integrity: Advanced High-Speed Design and Characterization

Please see content of the following new course which is scheduled for 2017. Course #53 Mastering Power Integrity with Signal Integrity and EMC Foundations

We recommend you to submit your preliminary or firm registration at least 4 weeks before course start to ensure a seat on the course.

TECHNOLOGY FOCUS

Power distribution is becoming an increasing challenge in today's electronic designs, small and big alike.  Properly designed power distribution is a key requirement to achieve good signal integrity and to avoid electro-magnetic interference problems.

In recent years, parallel signalling rates exceeded 1000Mbps and main-stream serial signalling is in the 5-10 Gbps range; signal rise and fall times shrink to below 10 ps. 
As a result, laminate and copper characteristics, glass-weave and surface roughness, frequency-dependent trace and component parameters, inter-symbol interference (ISI), jitter and finite bit-error-rate (BER) all need to be considered. With the increasing utilization of equalization and pre-emphasis, validations even with eye diagrams may not be sufficient.

Today, equally challenging is the proper design of power distribution. A multitude of supply voltages and signalling levels come with reduced timing and noise margins. The allowed noise on signals and on supply rails decreases and the increasing density and bandwidth of interconnects inter-link the previously independent power-integrity, signal-integrity and EMC design domains. 

COURSE CONTENT
This unique course provides a unified analysis and design approach to the power-integrity and signal-integrity disciplines with a brief overview of EMI-prevention tasks in modern digital systems. 
It focuses on the most recent challenges that the digital and mixed analog/digital designers face, with an increased portion devoted to power distribution analysis, design methods, solutions and component selection. 
The course deals with the underlying physical rules with minimal mathematics. With interactive software and live hardware and software demo illustrations, the various good and bad design choices are explained and trade-offs are shown for achieving high-performance yet cost-effective designs.

For power distribution and EMC, emphasis is put on the proper impedance profile of the bypass network and how to estimate and compare the worst-case transient noise of various design methodologies. For high-speed signal transmission, emphasis is put on the dispersive and lossy nature of PCB and package traces showing the link between rise-time degradation, jitter, eye closure and the frequency-dependent dielectric constant, dielectric loss tangent and copper surface roughness.

Participants will receive several of the tools and simulation files shown in the class.


Monday
Common Foundation of Signal and Power Integrity

  • Signal Spectrum, Time and Frequency-Domain Solutions
  • Characteristic Impedance, Delay, Matching and Termination Solutions and Rules; Mismatch in the Time and Frequency Domain
  • Time and Frequency Domain Solution, Network Matrices
  • PCB Construction Rules, Important Material Properties, Stackup, Layout, Design Rules

Examples, live HW and SW demos: Calculation of Interconnect Parameters, Reflection, Matching, Signal Bandwidth and Spectra

Tuesday
Multi-Line, Loaded and Lossy Interconnects

  • Crosstalk and Crosstalk-Reduction, Crosstalk Metrics in Time and Frequency Domain
  • Differential Interconnects, Effects of Imbalance, Interpreting and Calculating Mixed-mode S parameters, Mode Conversion
  • Effect of Electrical Loading and Discontinuities on Interconnect Characteristics
  • Skin Loss, Dielectric Loss, Surface Roughness, Laminate and Copper selection, Through Holes and Vias, Bends, Stubs
  • Designing for Multi-Line Crosstalk, Simultaneous Switching Noise

Examples, live HW and SW demos: Effect of Capacitive Loading on Transmission Bandwidth, Designing for a Specific Crosstalk Goal

Wednesday
Signal Integrity System Design

  • Parasitics of RLC Components, How to Interpret Catalog Data and How to Create Accurate Simulation Models
  • Grounding, Shielding and EMI Rules
  • Clock Distribution, Skew, Jitter, Jitter Separation, Relation to Bit Error Rate (BER)
  • Clock Sources and Drivers, Clock PLLs, Spread-spectrum Clock
  • Jitter Tolerance and Jitter Transfer
  • ISI, Eye Diagram, Peak Distortion Analysis, and Linear Network Solutions of Passive Interconnects

Examples, live HW and SW demos: Termination and Resonances in Clock Networks, Do-It-Yourself Calculate Worst-Case Eye

Thursday
Power Distribution Design Methodologies

  • DC drop on Planes, DC Power Distribution, Proper Selection of Plane Shapes
  • DC-DC Converters, Transient Response, Output Impedance, Loop Stability
  • Lumped PDN Design
  • Bypass Capacitor Selection and Placement, Service Area of Capacitors
  • Multi-node PDN Design

Examples, live HW and SW demos: Simulation of Bypass Capacitor Service Area, Output Impedance and Gain-Phase Plots of DC-DC Converters, How to Measure Reliably Very Low Impedance Values

Friday
Signal and Power Integrity Measurements and Modelling

  • High-frequency Bypassing with Power-Ground Laminates
  • Inductance of Vias, Planes, Bypass Capacitors
  • Process of PDN Design; Determining Target Impedance
  • Synthesizing PDN impedance: Pros and Cons of Multi-pole, Big-V, DMB Design Strategies
  • Unified PDN and SI Design: Impulse and Step Responses, Calculating Worst-case Noise
  • S-parameter Models, Calibrations and De-embedding Procedures
  • High-frequency PDN Design, Service Radius of Bypass Capacitors vs. Matched Planes
  • Designing Filters for Analog Pins (SerDes, PLL)

Examples, live HW and SW demos: Anatomy of PDN resonances, Filter Design and Performance, SI and EMC co-design

 

See also the two companion courses, one entirely devoted to signal integrity and another, discussing power integrity in more detail.   #55 Signal Integrity: Advanced High-Speed Design and Characterization and course #56 Power Integrity: Advanced Design and Characterization

 

Book Information:
Dr. Novák has written a book together with a colleague and would like to mention it as "recommended reading", however, it is not compulsory for the course.

Publisher: Artech House
Title: Frequency-Domain Characterization of Power Distribution Networks
Authors:  Istvan Novak and Jason R. Miller
ISBN 978-1-59693-200-5

Copyright 2007, 360 pages

Students may order the book over the Artech House website, http://www.artechhouse.com and receive a 15% discount by entering the promotion code "CEI" in the online order form.

CEI-Europe AB, Teknikringen 1F, SE-583 30 Linköping, Sweden Phone +46-13-100 730 Fax +46-13-100 731 cei@cei.se