Course 057 Synchronization and Interconnect in Multiple Clock Domain Systems-on-Chips, SoCs

Dr. Reuven Dobkin, CTO of vSync Circuits Ltd. is teaching this 4-day course that explains the Science, Engineering and Art of Synchronization.

Larger and faster Systems-on-Chips employ Multiple Clock Domains on the same die for several reasons: Communications with external real-time or pre-defined clocks require chips to incorporate multiple, unrelated clock frequencies; it is more economical in very large chips to break down the system into independently clocked domains, saving some of the power required for clock distribution; and dynamic scaling of voltage and frequency creates multiple clock/voltage domains.