TECHNOLOGY FOCUS

This last decade Silicon-on-Insulator (SOI) MOSFET technology has demonstrated its potentialities for high frequency (reaching cut-off frequencies close to 500 GHz for nMOSFETs) and for harsh environments (high temperature, radiation) commercial applications. SOI also presents high resistivity substrate capabilities, leading to substantially reduced substrate losses, crosstalk and non-linearities.

Today, the demand for the newly developed RF-SOI is booming and it is becoming the major material adopted by all the foundries for high-performance RF applications. All new smartphones have RF-SOI inside.

More recently, SOI technology has been emerging as a major contender for heterogeneous microsystems applications.

In this series of lectures, we will demonstrate the advantages of SOI technology for RF CMOS integration as well as for building thin film sensors on thin dielectric membrane and three-dimensional micro-electro-mechanical (MEMS) sensors and actuators co-integrated with their associated SOI CMOS circuitry. SOI is for sure today one of the most promising technologies for meeting the requirements of More than Moore roadmap.

Besides the RF SOI and SOI MEMS thematics, two other major aspects that nanoelectronics is facing today will be covered by the lectures. The first one concerns the economic, technical, environmental, and social issues related to the development of the nanoelectronics required by the fast on-growing digital society. Everything seems to be fast, clean, reconfigurable, etc. but behind our screens there is an industry which requires, more than ever, space, energy and matter.

Since tens of billions electronics objects are being disseminated all over the word in homes, buildings, cars, roads, etc., there is an urgent need to revisit the economic, technological, and societal models to develop a sustainable electronic industry that will care about its impact right from the design of these objects.

The second topic which will be addressed concerns the need to develop new characterization techniques to explore the physical properties of materials at the size that are used in today electronics, it means at nanometer scale. MEMS-based lab-on-chips to extract the (electro)-mechanical properties of thin metals, dielectrics and semiconductors will be presented.

On-Chip and 3D Interconnects
On-Chip and 3D Interconnects

COURSE CONTENT

The primary objectives of the course are as follows:

(a) Exposing the participants to fundamentals and applications of Silicon-on-Insulator (SOI) Technology

(b) Provide in-depth content which covers wide perspective i.e. from device to microsystem in SOI technology

(c) Capability building of participants in terms of usability and maturity of SOI technology for wide ranging real world applications

WHO SHOULD ATTEND

This course is for engineers working in the field of microelectronics, designers of microwaves devices and MEMS sensors.

On-Chip and 3D Interconnects

DAY 1:

- Specifications of RF ICs such as RF switches, LNA, PA,… (1 hour)
- MOS capacitor over a wide frequency band (1,5 hour)
- RF interconnection lines on top of silicon-based substrate, problematic of parasitic substrate    conduction (1 hour)
- Introduction of the trap-rich concept (1 hour)
- High quality interconnection lines and passives on top of trap-rich SOI (2 hours)
- Impact of temperature on passive elements integrated on Si-based substrate (1 hour)

 DAY 2:

- Newly developed techniques to improve the RF performance of Si-based substrate, such as buried depletion layer between implemented PN junctions, formation of porous silicon, depletion layer induced by field effect, etc. (1 hour)
- Small-signal equivalent circuit of SOI MOSFET (1,5 hour)
- Analog and RF performances of state-of-the-art RF SOI transistors (2 hours)
- RF performance and self-heating comparison between FinFET and FD SOI transistors (2 hours)
- Urgent need for more sustainable electronics (1,5 hour)

DAY 3

- Bulk micromachining techniques (1 hour)
- Surface micromachining techniques (1 hour)
- SOI MEMS sensors (2 hours)
- Internal stress in thin films, source of innovation for building 3D MEMS (1 hour)
- Simple lab-on-chip MEMS device to characterize the (electro-)mechanical properties of nanometer scale materials (1,5 hour)